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fpga.org
•
70 days ago
It's also a fantastic way to get an easy-to-see super high bandwidth debug channel out of a design using as few as 3 output pins.
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khubbard.bsky.social
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70 days ago
Would have been really cool if a single SYNC would have been used for both VSYNC and HSYNC. Then it would be just 2 I/O pins and GND. I see no reason why this couldn't have worked - a really long SYNC pulse is VSYNC, a really short SYNC is HSYNC.
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khubbard.bsky.social
•
70 days ago
Analog VGA could have been over a 5-conductor TRRS 3.5mm headphone jack! I suppose the single return may have created some issues.
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fpga.org
•
70 days ago
(Long sync / short sync:) the WS2812 of video signals.
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