What is #Intel #VPMM (Vector Extension Packed Matrix Multiplication)? CPUID.24h.ECX=1.ECX[0]
From the latest TDX 1.5 specification (348549-006US pdf), p. 116.
https://cdrdv2-public.intel.com/853286/intel-tdx-module-base-spec-348549006.pdf
cc: @fclc.bsky.social
From the latest TDX 1.5 specification (348549-006US pdf), p. 116.
https://cdrdv2-public.intel.com/853286/intel-tdx-module-base-spec-348549006.pdf
cc: @fclc.bsky.social
Comments
Effectively a way to overlay matrix capabilities using the existing register file, instead of changing/adding state the way AMX operates
Maybe TDX would(?) expose AMX units in a shared way like Apple did on M-Series ? (SME/Apple "AMX")
@fclc.bsky.social
Looking up for this on https://PPLX.ai, brought me up to this substack -> https://fprox.substack.com/p/taxonomy-of-risc-v-vector-extensions. Got a few nice @instlatx64.bsky.social style diagams for RISC-V plus some other nice stuff too :)